74HC174N (Hex D Flip-Flop with Reset)
The 74HC174Ā are hex positive edge -triggered D-type flip-flops with individual data inputs (Dn) and outputs (Qn). The common clock (CP) and master reset (MR ) inputs load and reset all flip-flops simultaneously.Ā
The D-input that meets the set-up and hold time requirements on the LOW-to-HIGH clock transition is stored in the flip-flop and appears at the Q output.Ā
A LOW on MR causes the flip-flops and outputs to be reset LOW. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC.
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74HC174N (Hex D Flip-Flop with Reset)
74HC174N (Hex D Flip-Flop with Reset)
The 74HC174Ā are hex positive edge -triggered D-type flip-flops with individual data inputs (Dn) and outputs (Qn). The common clock (CP) and master reset (MR ) inputs load and reset all flip-flops simultaneously.Ā
The D-input that meets the set-up and hold time requirements on the LOW-to-HIGH clock transition is stored in the flip-flop and appears at the Q output.Ā
A LOW on MR causes the flip-flops and outputs to be reset LOW. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC.
Original: $0.38
-71%$0.38
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Description
The 74HC174Ā are hex positive edge -triggered D-type flip-flops with individual data inputs (Dn) and outputs (Qn). The common clock (CP) and master reset (MR ) inputs load and reset all flip-flops simultaneously.Ā
The D-input that meets the set-up and hold time requirements on the LOW-to-HIGH clock transition is stored in the flip-flop and appears at the Q output.Ā
A LOW on MR causes the flip-flops and outputs to be reset LOW. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC.
